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Digital RTL Engineer

Trabajo disponible en: 04810, Madrid, Andalucia, España
Empresa: KD
Tiempo completo puesto
Publicado en 2026-01-20
Especializaciones laborales:
  • Ingeniería
    Ingeniero de sistemas, Ingeniero Electrónico, Ingeniero de Software, Ingeniero de Hardware
Rango Salarial o Referencia de la Industria: 50000 - 70000 EUR Anual EUR 50000.00 70000.00 YEAR
Descripción del trabajo

Functional Always active Storage or technical access is strictly necessary for the legitimate purpose of allowing the use of a specific service explicitly requested by the subscriber or user, or for the sole purpose of carrying out the transmission of a communication over an electronic communications network.

Preferences:
Preferencias El almacenamiento o acceso técnico es necesario para la finalidad legítima de almacenar preferencias no solicitadas por el abonado o usuario.

Statistics:
El almacenamiento o acceso técnico que es utilizado exclusivamente con fines estadísticos. Storage or technical access that is used exclusively for anonymous statistical purposes. Without a requirement, voluntary compliance by your Internet service provider, or additional records from a third party, information stored or retrieved solely for this purpose cannot be used to identify you.

Marketing:
Marketing Storage or technical access is necessary to create user profiles to send advertising, or to track the user on a website or several websites for similar marketing purposes.

Responsibilities
  • Implement ASIC / SoCs / FPGAs for multiple products, starting at the specification & design phase, continuing through technology selection, implementation, and validation. Innovation in performance, power, and cost to build the best possible product is a must.
  • Participate in all phases of ASIC / FPGA design flow (Synthesis, Place & Route, and Timing Closure) as required.
  • Work with backend teams to address any layout and timing issues for ASICs.
  • Verification by emulation with FPGAs in the lab.
  • Involvement in lead-up, validation, characterization, and qualification phases of ASICs.
  • Requirements

    Required title: MSc in Electronics, Electrical, Computer Engineering or relevant field.

    Required expertise: at least 4 years in similar tasks.

    Knowledge and Skills
    • One or more of the following:
      Networking, Wireless, Modem, video CODEC, and Logic design experience.
    • Experience with Verilog and System Verilog.
    • Experience with latest simulation and verification methodologies (OVM, UVM).
    • Experience with EDA tools such as HDL Synthesis (Synopsys DC), HDL simulators (VCS, Questa, IES), HDL Lint tools (Spyglass), FPGA tools (Xilinx Vivado, Altera Quartus II).
    • Demonstrated ability to deliver a product from concept to production.
    • Ability to work in a dynamic environment with changing needs and requirements.
    • Excellent English communication skills, both written and verbal.
    • Strong software design skills are a plus.
    Personal Profile
    • Continuous pursuit of technical excellence.
    • Passion for learning from experience.
    • Critical and constructive attitude.
    • Capability to accept responsibilities from implementation to validation in the laboratory.
    • Proactive problem-solving attitude.
    • Rigor when dealing with production-related information.
    • Zero bug tolerance.
    Place of work
    • Remote work option available depending on the candidate’s profile.
    • .
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