More jobs:
Design Verification Engineer – SoC/IP DV; SystemVerilog/UVM
Job in
Los Angeles, Los Angeles County, California, 90079, USA
Listed on 2026-01-25
Listing for:
Apple
Full Time
position Listed on 2026-01-25
Job specializations:
-
Engineering
Software Engineer, Engineering Design & Technologists, Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
A leading technology company in California seeks a Design Verification Engineer to be part of a dynamic team focused on crafting innovative products. The role entails conducting pre-silicon verification, developing test plans, and enhancing verification methodologies using cutting-edge technology. Ideal candidates should possess strong skills in System Verilog, UVM, and OOP, with the ability to thrive in a fast-paced environment that encourages creative problem-solving.
Comprehensive benefits are offered, including medical coverage, retirement plans, and employee stock programs.
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