FPGA Design​/Verification Engineer

We have an outstanding Contract position for an FPGA Design/Verification Engineer to join a leading Company located in the Littleton, CO surrounding area.

Pay Rate: $80 - $100

US Citizenship is required.
Candidate must possess an Active Secret Security Clearance.

The selected candidate will be responsible for ASIC & FPGA verification utilizing UVM.

• Support other aspects of ASIC and FPGA development, such as architecture, design, analysis, and test.
• Support technical reviews and be able to present to internal and external customers.
• Devise a unique verification plan for a given design.
• Use System Verilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
• Document verification plan and results.
• Work with an independent verification team to resolve bugs found in the design.

• ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM, or VMM.
• Minimum 3 years of professional experience.

Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and Daily Pay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.

Military connected talent encouraged to apply.

To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit  or

The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:

• The California Fair Chance Act
• Los Angeles City Fair Chance Ordinance
• Los Angeles County Fair Chance Ordinance for Employers
• San Francisco Fair Chance Ordinance