ASIC/FPGA Design Engineer III
Listed on 2026-01-15
-
Engineering
Systems Engineer, Electronics Engineer, Aerospace / Aviation / Avionics
Description
Please join us as an ASIC & FPGA Design Engineer
, where you will work within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will help support over 50 different programs and research and development (R&D) efforts. Your work will impact military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions.
This position does not support teleworking. The selected candidate will be located near the Lockheed Martin Space facility in Littleton CO
. You will work a flexible 9x80 schedule in the office full-time.
Space is a critical domain, connecting our technologies, our security and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more—innovate, invest, inspire, and integrate our capabilities to transform the future. At Lockheed Martin Space, we aim to harness the full potential of space to cultivate innovation, reduce costs and push the boundaries of what technology can achieve.
We’re creating future‑ready solutions, focusing on resiliency and urgency through our 21st Century Security® vision. We’re erasing boundaries and forming partnerships across industries and around the world. We’re advancing spacecraft and the workforce to fuel the next generation. And we’re re‑imagining how space can connect us, ensuring security and prosperity. Join us in shaping a new era in space and find a career built for you.
Activities
- Work with low SWaP, radiation‑hardened, space‑rated devices.
- Perform all aspects of ASIC and FPGA development from initial requirements capture through architecture, design, analysis, simulation and test in a Linux‑based high‑performance computing environment.
- Support technical reviews and present to internal and external stakeholders.
- Interface with an independent verification team who will be working in parallel to verify the design.
- You must be an independently minded and well‑organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast‑moving corporal.
- 3+ years of professional experience.
- No clearance is required to start, but you must obtain and maintain a DoD Secret clearance
, and US Citizenship is required.
Our employees volunteer more than 850,000 hours annually, strengthening quality of life where we live and work.
Learn more about Lockheed Martin’s comprehensive benefits package.
We value your skills, training and education and believe that by applying the战 highest standards of business ethics and visionary thinking, everything is within our reach—and yours as a Lockheed Martin Space employee.
Basic Qualifications- Bachelor of Science or higher in Electrical Engineering or related discipline, or equivalent experience/combined education.
- Experience in the design of FPGA and/or ASIC devices.
- Experience in ASIC/FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
- HDL programming experience with VHDL, Verilog and/or System Verilog.
- Lab experience in bringing up FPGA and EE/software integration experience.
- Willing and able to obtain and maintain a DoD Secret clearance; US Citizenship is required.
- Knowledge of space‑grade/qualified FPGAs.
- Experience or knowledge of MS Project, JIRA.
- Knowledge of Linux drivers, NVM (NAND/MRAM), Flash Management, Ethernet protocols.
- Experience designing with AMD Versal, Microchip RTG4 FPGAs.
- Lab testing experience.
This position requires a government security clearance; you must be a US Citizen for consideration.
Clearance Level: Secret
.
The annual base salary range for this position in California, Massachusetts and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $101,000 – $178,135. For states not referenced above, the salary range reflects the candidate’s final work location. This general guideline is provided;
Lock होइन considers scope and…
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