Microfabrication Engineer - Quantum Processor Engineering CDI

Microfabrication Engineer – Quantum Processor Engineering (CDI 100%)

SA. Vacant since: 25.02.2026. Number of jobs: 1.

Location:

1000 Lausanne (VD). 100% CDI. Immediately. Permanent.

At IDQuantique, we are building the world’s highest‑performing quantum computers. Our full‑stack technology, based around trapped‑ion qubits, includes custom compilers, embedded firmware, mixed‑signal and RF electronics, cryogenics, vacuum and lasers. It is designed, manufactured and operated by world‑leading scientists and engineers in the UK, the US and Switzerland.

We are now ready to extend our microfabrication team with a full‑time process engineer who will work in the CMi clean rooms and will be based in or close to Lausanne, Switzerland.

This is a primarily hands‑on, technical role, and the successful candidate will manufacture the ion‑trap chips that form the heart of our quantum computers.

The ion‑trap chips consist of multiple, interconnected layers of patterned metal with oxide separation and include integrated SiN photonic layers. They are fully manufacturable at the CMi cleanroom facility, and we also collaborate with external partners. The selected engineer may be involved in maintaining and advancing these collaborations, identifying new partners, and initiating suitable projects.

In addition to producing functioning ion traps, process development will be required to increase yield, meet more exacting tolerances, and investigate and implement new designs and functionalities.

You will be the only member of the microfab team based full time in Switzerland, but in‑person contact and support will be available from existing process engineers at least 30 % of the time, and online access to the whole company will be available at all times. You will be an extremely important and valued member of an enthusiastic and highly motivated company.

• End‑to‑end fabrication of ion‑trap chips; ensuring successful chip delivery through effective process‑flow design, execution of fabrication runs and accurate estimation of delivery timelines.
• Maintaining detailed wafer‑history runcards, tracking material and process data, and contributing to process development by designing and executing experiments to enhance yield, improve tolerances and integrate new functionalities.
• Documenting findings through reports.
• Maintaining and advancing collaborations with external partners.

• Chip delivery
• Process‑flow design – planning and execution of fabrication runs
• Estimation of delivery times
• Production of full wafer‑history runcards
• Process development
• Experimental design
• Report writing
• Maintenance of material & process database

• 3+ years experience with standard semiconductor processing
• 2D layout with e.g. Klayout software
• Laser and photolithography
• Thin film deposition
• Wet and dry etching
• Metrology: SEM, profilometry, etc.
• Excellent communication skills
• Excellent organisational skills
• Ability to work independently

• Experience with e‑beam lithography, particularly for photonic structures

• Work location: 1000 Lausanne (VD)
• Additional information on place of work: EPFL
• Workload: 100 %
• Employment start: Immediately
• Employment duration: Permanent
• Qualification: Skilled
• Work experience: More than 3 years
• Education: Master’s degree from a university of applied sciences or equivalent
• English – oral and written: Very good knowledge

By email: j