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Lausanne Formal Verification Engineer Speed RTL
Job in
1001, Lausanne, Canton de Vaud, Switzerland
Listed on 2026-02-28
Listing for:
European Tech Recruit
Full Time
position Listed on 2026-02-28
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
A semiconductor recruitment agency is seeking a Formal Verification Engineer based in Lausanne, Switzerland. This role involves developing and implementing formal verification methodologies for ASIC or FPGA designs. The ideal candidate has a strong background in verification technologies, scripting for automation, and is proficient in temporal logic assertion-based languages. The position offers the possibility to work from other locations including the UK, Germany, or Denmark.
Interested applicants should send their CVs to the provided email.
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