Principal Test Engineer

Staff or Principal Test Engineer

Location
:
Irvine, CA

• Technical Ownership: Own test engineering solutions across all product phases: silicon bring-up, characterization, customer sampling, qualification, and high-volume manufacturing.
• Test Architecture & Strategy: Define test strategy, coverage goals, and manufacturing methodologies; develop comprehensive product Test Plans and drive DFT alignment.
• ATE Solution Leadership:
  • Test programs and automation
  • ATE hardware platforms
  • Probe cards, load boards, fixturing, and mechanical interfaces
• Cross-Functional Leadership: Act as a core team member for new product introduction, participating in architecture reviews, testability/DFT reviews, and quality trade-off decisions.
• Coverage & Optimization: Partner with Design Engineering to ensure high test coverage, yield optimization, and test time targets.
• Correlation & Characterization: Correlate ATE results with bench validation data; characterize device performance and margins for volume production.
• Manufacturing Readiness: Coordinate with internal manufacturing, technology partners, and sub-cons to drive NPI test release and volume ramp.
• Mentorship & Influence: Provide technical guidance to other test engineers and help shape long-term test infrastructure and standards.

• Bachelor’s degree in electrical engineering or related field with 10+ years of test engineering experience (Master’s preferred).
• Expert-level experience with Advantest V93000 (93k) and/or Teradyne Ultra
  
  FLEX (UFLEX) platforms.
• Strong background in mixed-signal ATE development for complex SoCs including:
  • High-speed ADC/DAC
  • SERDES
  • DSP-based devices
• Solid understanding of Scan, MBIST, and loop-back test methodologies.

• Familiarity with bench instrumentation such as Network Analyzers and Sampling Oscilloscopes.
• At-speed wafer probe experience.
• Experience with schematic capture, PCB layout, and 2D/3D CAD tools.