Principal FPGA​/RTL Design Engineer - Signal Processing

Position: Principal FPGA / RTL Design Engineer - Signal Processing

Principal FPGA / RTL Design Engineer - Signal Processing

Silvus Technologies invites you to join as a Principal FPGA / RTL Design Engineer - Signal Processing. The role reports to the Senior Engineering Director in Irvine and works closely with the FPGA Engineering team on the research, development, and field deployment of advanced signal processing for our mobile ad‑hoc network radios.

Silvus is driven by a mission to keep our heroes connected. We deliver advanced MANET radios powered by custom MIMO waveforms that provide critical communications in challenging environments from underground tunnels to high‑altitude balloons. Our radios and waveforms are adopted worldwide by U.S. Departments of Defense, federal, state, local law enforcement, and industry leaders.

Role and Responsibilities

• Architect and design wireless communication projects with system engineers and digital design, including fixed‑point signal processing blocks.
• RTL coding, simulation, and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting; using logic analyzers.
• Provide support to RF and software engineering teams.

Required Qualifications

• Bachelor of Science in Electrical Engineering, Computer Science, or related field.
• Minimum 10 years of RTL design and FPGA implementation; advanced degree (MS or PhD) may replace years of experience.
• Demonstrated experience with fixed‑point binary arithmetic and digital signal processing designs.
• Deep knowledge of RTL design fundamentals using Verilog and System‑Verilog.
• Proven expertise working with front‑end RTL design tools, FPGA synthesis, timing closure, and high‑utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
• Must be a U.S. Citizen; background check required.

Preferred Knowledge, Skills, and Abilities

• Advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or relevant field.
• Basic MATLAB skills.
• Solid proficiency in scripting languages such as Perl and Python.
• Strong communication and presentation skills.
• Experience with wireless communication systems on FPGA or ASIC designs.

Working Conditions &

Physical Requirements

• Office environment.
• Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
• Lift equipment up to 20 lbs for set‑up of demonstrations and testing.
• Perform bending and reaching movements to place items on lower and higher shelves.
• Kneeling or squatting to access lower shelves.

Compensation

CA Pay Range $165,000 – $250,000 USD.

Employment and Eligibility

All employment is contingent upon a successful clearance of a background check. Silvus is a U.S. Federal Contractor and requires all candidates for any position to be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements apply to some R&D roles.

Equal Opportunity Employer Statement

Silvus is proud to be an equal‑opportunity employer. We value diversity and do not discriminate on the basis of race, color, age, religion, ancestry, national origin, sex, sexual orientation, gender identity, marital status, veteran status, disability, or any other protected characteristic. We provide reasonable accommodations for qualified individuals with disabilities.

Recruiting

Silvus does not accept unsolicited resumes from recruiters or recruiting agencies. No fee will be paid to third parties who submit unsolicited candidates directly to Silvus Technologies.

Seniority Level

• Mid‑Senior level

Employment Type

• Full‑time

Job Function

• Engineering and Information Technology

Industries

• Telecommunications

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