FPGA​/ASIC Design Engineer

Job Title

FPGA/ASIC Design Engineer

6 Months on W2 (Hybrid)

Indianapolis, IN

In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which will be integrated in current and future engine control system products. You will be responsible for developing FPGA/ASIC architectures, coding, running simulations, synthesis, creating test benches, and preparing documentation to be reviewed by certification authorities. An exciting opportunity to work closely with world class hardware and software engineers during planning, generating requirements, developing FPGA/ASIC architectures, designing, and testing custom FPGA/ASIC implementations, and system integration phases.

• Participate in all phases of project, to produce detailed design documentation, verification plans and reports.
• The design and development of all custom digital devices (ASIC or FPGA), to support RR electronic engine control units.
• The verification of complex products that use FPGAs and/or ASICs to DO-254.
• Develop RTL utilizing a hardware description language (e.g. VHDL, Verilog, and/or System Verilog) and debug the design via simulation tools.
• Expertise achieving timing closure on FPGA designs and generating test benches.
• Evaluate the process flow including but not limited to high level design, synthesis, place and route, timing constraints and power utilization.

• Bachelor's degree in Electronics Engineering and/or Computer Engineering with 5+ years of experience, OR
• Master's degree in Electronics Engineering and/or Computer Engineering, OR
• JD/PhD.
• In order to be considered for this role, you must be a US Citizen.

• Minimum 5 years’ experience in FGPA/ASIC design.
• VHDL and Verilog experience.

• Validate the FPGA hardware in the lab using test equipment (oscilloscopes, logic analyzers) and debug tools (e.g. ILA, JTAG).
• Experience in scripting with languages such as TCL, Python, Shell scripts.
• Able to work with Windows and Linux development environment.
• Demonstrable experience in version control, such as Git, SVN.
• Experience of Actel & Xilinx tool flows to implement complete designs.

25% Travel between sites:
Indianapolis and West Lafayette, IN as needed for work.