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Sr. EDA Tools Engineer - ESD

Job in Hillsboro, Washington County, Oregon, 97104, USA
Listing for: Intel
Full Time position
Listed on 2026-01-26
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering
  • IT/Tech
    Systems Engineer, Electrical Engineering
Job Description & How to Apply Below

Job Details

Intel is shaping the future of technology to help create a better future for the entire world. Our work in AI, analytics, and cloud-to-edge technology powers major breakthroughs that improve everyday life. Join us to help make the future more wonderful for everyone.

This position is within the Design Technology Platform (DTP) organization. The PERC ESD development team within DTP is responsible for developing PERC ESD rule decks for Intel’s latest technologies. Your work will enable design teams to reach market faster with leadership products on cutting edge technologies. As part of the DTP/PDK group, you will join a highly motivated team solving challenging technical problems to enable PDKs for Intel’s most advanced process technologies and drive PDKs toward industry标准 methods and ease of use for end customers.

Responsibilities
  • Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
  • Create and maintain reliability ESD and LU design rule methodologies and specifications.
  • Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.
  • Build and execute test cases for rule debugging, validation, and signoff.
  • Define QA requirements and drive automation to improve robustness and efficiency of rule checks.
  • Lead innovation initiatives to enhance existing ESD/LU verification automation, tools, and methodologies.
  • Identify and analyze ESD/LU design problems, define root causes, and drive practical solutions across teams.
Qualifications

You must possess the minimum qualifications to be considered. Preferred qualifications are in addition to the minimum requirements. Experience may be from schoolwork, research, and/or relevant work experience.

Minimum Qualification

  • Master s degree or PhD in Electrical Engineering or Computer Engineering.
  • 3+ years of relevant industry experience in physical design verification (reliability, device physics, process technology, and design rules, extraction or related domains).
  • 2+ years  experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools).
  • 2+ years  experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation.

Preferred Requirements

  • Creative, independent, and  out of the box  thinker with strong analytical and problem-solving abilities.
  • Strong knowledge of ESD/LU Pre Si models (HBM, CDM), I/O design, and related methodologies.
  • Strong attention to detail and excellent organization skills.
  • Ability to connect the dots across domains and propose cross-disciplinary optimal solutions.
  • Self-drive with strong leadership skills; able to influence and align internal and external stakeholders.
  • Excellent written and verbal communication skills; able to present complex technical concepts clearly and concisely.
  • Proven success working with cross-functional and cross-site teams, with the ability to influence multiple internal and external partners.
  • Demonstrated ability to work in a fast-paced, team-oriented environment and drive issues to closure.
  • Proven ability to work effectively in a dynamic, team-oriented environment.
  • Experience driving cross-functional and industry-wide initiatives or task forces.
Benefits

Our total rewards package goes beyond a paycheck. We offer benefits to help you build your career, improve your health, and protect your wealth. For details of benefits available to you, refer to Intel Benefits and Intel Careers. Intel reserves the right to modify, change, or discontinue benefit plans at any time in its sole discretion.

Work Model

This role will require an on-site presence. Specific work model, location, and time type are subject to change.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, disability, medical condition, genetic information, military status, marital status, pregnancy, gender, gender identity or expression, sexual orientation, or any other characteristic protected by law.

Additional Information:
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during the hiring process.

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