Physical Design Engineer

In this position, you will be developing and supporting mixed signal and custom digital hard IPs.

The job will entail: files, generating of Hard IP collateral for SOC consumption, verifying collateral quality, and providing collateral support to SOC customers. verifying digital timing performance, noise analysis, logic equivalence, power characterization, netlist support of layout tasks, analysis of late changing process

• The candidate should have a Bachelor's degree in Electrical Engineering or Electrical and Computer Engineering.
• More advanced degrees are preferred.
• Experience with static timing analysis tools, custom analog simulation, Cadence schematic entry, familiarity with various mixed signals circuits like analog IO, PLL, clock generation, analog-to-digital converters, and LDO voltage regulator circuits.
• Years of experience required for this positions: 3+ years.
• HS diploma or GED equivalent required for US candidates.
• Good verbal and written communication skills.

All your information will be kept confidential according to EEO guidelines.