Senior Analog IC Design Engineer

About the client:
My client is a UK-based semiconductor company that designs, manufactures, and supplies mixed-signal, RF, and microwave ICs for global communications markets. They are actively expanding into next-generation RF, 5G, and mmWave applications, with a focus on becoming the semiconductor partner of choice for communications innovators.

To strengthen the team, they are seeking an experienced Senior Analog IC-Designer.

• A hands‑on role for a self‑motivated Analog IC Design engineer who will join our New Product Engineering team working on the design of Analog and Mixed signal circuits at our Design Center in Essex, United Kingdom.
• Your responsibilities include circuit design, implementation and verification of complete sub‑systems for sub‑6G ICs.
• Experience in some or all of the following is required: strong understanding of basic concepts and theories in Analog and RF design, such as mismatch, linearity, stability and noise. The design of Power Management circuits, PTAT, Bandgap, VGA, Filter, TIA, PLL, or other baseband modules in BiCMOS and/or RF‑CMOS processes.
• Collaborating with the test team across multiple sites, you will also contribute to the development of the test plan and ASIC characterization.
• The person appointed to the role will report to the Head of Silicon Engineering.

• Designing blocks such as filters, high speed multiplexer, divider circuits, bias circuits, bandgap, fractional N PLL, etc.
• Working with a variety of technologies including SiGe & CMOS to implement innovative high-performance IC.
• Excellent time management and organisation skills.
• Produce detailed design documentation of all blocks developed.
• Support product evaluation.
• Open collaborative mind-set.
• Good communicator.

• Master’s degree or PhD in a closely related field; or proven industrial track record.
• Several years’ experience of IC design.
• Expertise with Cadence Virtuoso tools and version control.
• Silicon experience of SiGe Bipolar and CMOS technologies.
• Successful track record of right first‑time silicon.
• An understanding of design for manufacture.
• Working knowledge of IC layout techniques in a Cadence Virtuoso environment.
• Familiarisation of ESD protection techniques.