VHDL Design Engineer

Capgemini Engineering provided pay range

This range is provided by Capgemini Engineering. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Direct message the job poster from Capgemini Engineering

Guildford – On site 4/5 days a week for first 3 months then relaxed

The ideal candidate will be responsible for executing and leading the full design process from ideation to production. You will draw new designs and update our current designs. During the creation process, you will ensure that our designs meet all necessary design responsibilities.

• Design, develop, and simulate FPGA designs in VHDL
• Take mission requirements and translate down to FPGA implementation
• Perform simulation, synthesis and timing analysis to verify functionality and performance
• Create test benches for functional verification
• Generate appropriate design documentation
• Work closely in a core project team
• Responsible for the delivery of all aspects of the defined/delegated package of work which includes Technical Solution, Budget and Schedule

• Several years experience of FPGA design
• Experience of system level debug and test

• Knowledge of FPGA design in VHDL
• Knowledge of Lab Test Equipment
• Commitment to deliver to challenging schedules
• Good interpersonal skills
• Organised approach
• Draw, update, and maintain designs
• Manage multiple complex projects at the same time
• Ensure our designs meet manufacturing, technical and customer responsibilities
• Ensure that all design projects are completed within budget and time

Mid-Senior level

Full-time

Design

Design Services