Senior Silicon Verification Engineer - SV​/UVM​/Formal

A technology leader is seeking a highly skilled Verification Engineer to ensure functional correctness of complex silicon designs. This role involves leading verification test plans, collaborating with architecture teams, and applying advanced techniques. Ideal candidates must possess strong proficiency in System Verilog and a history of simulation-based methodologies. This position offers an opportunity to work on crucial projects that impact hardware innovations while fostering a collaborative environment.

Join a dynamic team dedicated to excellence in silicon technology.
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