Silicon Design Verification Engineer; III

Placement Details

Position Type:
Temporary

Salary: $94.46–104.95 hourly (up to $104.95/hr)

Start Date:

Jan 19, 2026

Are you ready to help define the next generation of intelligent devices? Join a pioneering team at the forefront of silicon innovation, where your work will directly impact the performance, reliability, and success of groundbreaking hardware. This is an opportunity to contribute to mission‑critical projects in a collaborative environment that values technical excellence, curiosity, and strong problem‑solving skills.

Our client is a global leader in advanced technology, consistently pushing the boundaries of what's possible in the digital world. Known for their commitment to innovation, they build products that touch the lives of millions worldwide. The organization fosters a culture of continuous learning and collaboration, empowering engineers to tackle complex challenges and deliver impactful solutions.

We are seeking a highly skilled and motivated Verification Engineer to join a dynamic team focused on ensuring the functional correctness of complex silicon designs. In this critical role, you will own verification outcomes for key projects and contribute to both execution and the advancement of verification standards and best practices.

You will play a central role in building and evolving robust verification environments, proactively identifying risks, and influencing cross‑functional teams with your deep expertise in silicon engineering technologies. Your work will directly support delivering high‑quality, fully verified designs on schedule.

• Lead the development of comprehensive verification test plans, including strategy, environment, components, stimulus, checks, and coverage, with clear and actionable documentation
• Collaborate closely with architecture and design teams to verify functional correctness of logic designs, often leading small verification efforts
• Partner with cross‑functional teams to diagnose and resolve design issues across multiple stages (boards, software, manufacturing, thermal, etc.)
• Apply advanced verification techniques and methodologies independently and while mentoring or guiding small teams
• Leverage industry‑standard tools and languages (including System Verilog) to execute and continuously improve verification processes

• Strong proficiency in System Verilog (SV) coding
• Extensive experience with simulation‑based verification methodologies
• Proficiency with Universal Verification Methodology (UVM)
• Experience writing and using System Verilog Assertions (SVA)
• Hands‑on experience with formal verification techniques
• Strong scripting and verification infrastructure development skills
• Demonstrated domain knowledge in silicon design
• Expertise in developing and using testbench components and verification techniques
• Excellent communication, comprehension, and collaboration skills
• Proven analytical and problem‑solving abilities

Aquent is an equal‑opportunity employer. We celebrate diversity and are committed to creating an inclusive environment where individuals of all backgrounds, experiences, and perspectives can thrive and grow their careers.