Principal Electrical Engineer: FPGA Security Clearance

Position: Principal Electrical Engineer: FPGA with Security Clearance
Date Posted:

Country:
United States of America

Location:

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
Position Role Type:
Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements:
The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
Security Clearance Type:
DoD Clearance:
Secret
Security Clearance Status:
Active and existing security clearance required after day 1 At Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today's mission and stay ahead of tomorrow's threat.

Our team solves tough, meaningful problems that create a safer, more secure world. The Multi-Product Power & Digital (MPD) department designs FPGAs, circuit cards, and electronics subassemblies for a range of products including missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production and sustainment.

The MPD department is seeking a Principal FPGA Engineer to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions for sensor and effector products. You will partner with experienced, multidisciplinary teams to define requirements, develop architectures, execute detailed design and simulations, and perform integration and verification tasks. You will document your designs within the appropriate configuration management tools and provide comprehensive engineering support throughout the product lifecycle.

This position is an onsite role, located in Fort Wayne, IN. What You Will Do
* Provide full lifecycle support of production quality FPGA designs for all major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi) using tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.

* Generate FPGA designs for the following applications: gigabit and multigigabit transceiver (MGT) serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing and processor interfaces.

* Translate system level requirements into FPGA requirements

* Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)

* Lead small teams of FPGA engineers and code in VHDL for reliability and maintainability

* Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage

* Define schedules for FPGA tasking and drive execution to the planned budget and schedule.

* Identify and manage project risks and opportunities.

* Create complete documentation including requirements, verification plan, and user's guides

* Lead medium sized teams to success.

* Coach, review, and delegate work to junior engineers.

* Serve as a subject-matter expert within discipline.

* Lead internal and external technical reviews.

* Support customer interactions and relations.

* Contribute to product and technology roadmaps

* Make improvements to processes, systems or products to enhance overall performance

* Engage in personal technical growth and facilitate technical growth in peers and junior engineers. Qualifications You Must Have
* Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience

* Experience to include one or more of the following:
* FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding)

* Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.

* Hands on experience with integration and debug of FPGA/ASIC in a lab environment

* Experience with timing closure, clock domain crossing and reset domain crossing analysis, and constraint development.

* Experience with…