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Systems Engineer

ASIC STA Engineer: Timing & SoC Verification

Job in Cupertino, Santa Clara County, California, 95014, USA
Listing for: Apple Inc.
Full Time position
Listed on 2025-11-29
Job specializations:
  • Engineering
    Systems Engineer
  • IT/Tech
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 147400 - 272100 USD Yearly USD 147400.00 272100.00 YEAR
Job Description & How to Apply Below
A leading technology company in Cupertino is seeking an ASIC STA Engineer to manage timing closure in SOC design. The role involves developing timing methodologies and collaborating with multifunctional teams to resolve complex issues. Candidates should have a Bachelor's Degree and 3 years of related experience, along with strong digital design fundamentals and proficiency in scripting. This position offers competitive compensation and comprehensive benefits.
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