Senior​/FPGA Engineer

Same platform, different brand. Your saved jobs and alerts as well as your log in details have moved with you

Job

Location:

ST Engineering Jurong East Bui, SG

ST Engineering is a global technology, defence, and engineering group with offices across Asia, Europe, the Middle East, and the U.S., serving customers in more than 100 countries. The Group uses technology and innovation to solve real‑world problems and improve lives through its diverse portfolio of businesses across the aerospace, smart city, defence, and public security segments. Headquartered in Singapore, ST Engineering ranks among the largest companies listed on the Singapore Exchange.

Our history spans more than 50 years, and our strategy is underpinned by our core values – Integrity, Value Creation, Courage, Commitment and Compassion. These 5 core values guide every aspect of our business and are embedded in our ST Engineering culture – from the people we hire, to working with each other, to our partners and customers.

Our Advanced Networks & Sensors business specializes in platform digitalization, advanced connectivity, and cutting‑edge manufacturing. This diversity of capabilities presents a range of roles through which you can contribute to the development of innovative, secure, and patented products. Join our team and play a crucial role in developing tomorrow’s technology and connectivity solutions and services to sectors spanning defence, public security, government, and the commercial realm.

Your work will have a global impact as we empower customers through advanced communications, intelligent sensors, and the deployment of AI‑enabled Edge applications for mission‑critical roles.

As a Senior / FPGA Engineer for Software Defined Radio (Baseband), you will be responsible to architect, implement, and validate baseband signal processing pipelines on modern FPGAs, integrating with high‑speed ADC/DACs and RF front‑ends. You will own the end‑to‑end flow—from algorithm prototyping to RTL implementation, timing closure, hardware‑in‑the‑loop (HIL) validation, and production readiness. You will work on RF, embedded software, systems, and test engineering to deliver robust, scalable, and high‑performance SDR products.

• Define SDR baseband architectures (DDC/DUC, filtering, FFT/IFFT, OFDM, MIMO/beamforming, automatic gain control, synchronization, timing/phase tracking).
• Partition algorithms across FPGA fabric, DSP blocks, and embedded CPU (SoC) for performance/latency/power trade‑offs.
• Develop high‑speed I/O subsystems (e.g., JESD
  204B/C, PCIe, 10/25/100
  
  GbE, Aurora, AXI4).

• Implement DSP and control logic in VHDL/Verilog/System Verilog; leverage Vendor IP and HLS where appropriate.
• Perform timing closure (setup/hold, CDC, multi‑clock design), resource/power optimization, and floor planning.
• Build test benches, UVM/lightweight verification, and hardware‑in‑the‑loop tests with real RF signals.

• Prototype algorithms in MATLAB/Simulink or Python (Num Py/Sci Py); ensure fixed‑point accuracy and bit true correlation with RTL.
• Develop golden reference models and maintain test vectors for continuous verification.

• Interface with RF front‑end (mixers, LNAs, filters) and high‑speed converters (ADC/DAC), including clocking, PLLs, and synchronization.
• Collaborate with firmware/software teams on drivers, DMA, kernel modules (Linux), and data path APIs.
• Integrate with SDR frameworks (e.g., GNU Radio, custom pipelines) and external control planes.

• Execute lab bring‑up using spectrum analyzers, VNAs, logic analyzers, and oscilloscopes.
• Conduct EVM, BER, throughput/latency, spur/noise, and phase‑noise/jitter characterization.
• Support DFx (DFT/DFM), manufacturing test, and field diagnostics; contribute to compliance (EMC/EMI) planning.

• Maintain requirements, interface specs, state machines, test plans, and design reviews.
• Adopt Continuous Integration/Continuous Deployment practice workflow for FPGA…