Senior Fuse​/JTAG & IP Design Lead

A leading semiconductor company in Chandler, Arizona, seeks a Principal Fuse/JTAG Design Lead to guide the design and development of complex JTAG and Fuse Subsystems. This role demands extensive experience in digital hardware design, specifically with System Verilog, strong leadership qualities, and expertise in managing design processes across multiple stages. The successful candidate will work closely with verification teams to ensure high-quality designs and contribute to the continuous evolution of methodologies and practices.

Competitive salary range offered between $241,100 and $326,100 per year.
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