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Senior Digital RTLGDSII Implementation Engineer

Job in Cambridge, Cambridgeshire, CB21, England, UK
Listing for: Palma Ceia SemiDesign
Full Time position
Listed on 2026-02-28
Job specializations:
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 GBP Yearly GBP 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: Senior Digital RTL2GDSII Implementation Engineer

Palma Ceia Semi Design (PCS), is a fast-growing, fabless semiconductor company, focused on developing highly integrated Wi‑Fi 6 chipsets. We require senior RTL2

GDSII digital implementation engineers to join our team of experienced design engineers in Cambridge, UK. Successful candidates will have proven knowledge and experience of physical implementation of digital designs including some or all of the following tasks: synthesis, DfT insertion, floor‑planning, place & route, LEC, DRC/LVS, and STA. There may also be opportunities for digital design tasks.

Essential Duties And Responsibilities
  • Work with digital design engineers and other RTL2

    GDSII engineers to produce highly optimized, power efficient, area efficient digital implementations for integration into SoCs.
  • Could be front-end focused (synthesis, DFT insertion, constraints, LEC) or back-end focused (floor‑planning, place & route, STA, DRC/LVS) depending on experience.
  • Work with design engineers and packaging engineers to ensure a high performance and cost effective overall SoC solution.
  • Potential for involvement in digital RTL design if candidate also has experience in this area.
  • Peer review of colleagues’ work.
Skills And Experience Essential Experience
  • Bachelor’s degree in electronic engineering or a related subject
  • Proficient in either front-end or back-end implementation tools (either Cadence or Synopsys based flows)
  • Proven ability to perform complex digital implementation tasks in an SoC context
  • Familiarity with design for test issues, packaging issues, and low power methodologies
Desirable Experience
  • Masters degree or higher
  • Proficient in both front-end and back-end digital implementation tools
  • Proficient in DFT insertion methodologies
  • Proficient in low power methodologies
  • Experience of top‑level chip integration, including complex analogue macros
  • Experience of tape‑out flow
Attributes
  • Good written and verbal communication skills
  • Strong team‑player
  • Can‑do attitude
  • Mind‑set to produce high quality, maintainable work
  • A willingness to get involved in whatever needs doing
Additional Information
  • Job Site:
    Cambridge, UK
  • Email resumes to:
  • No calls. EOE.

Programme Manager — Cambridge, UK

Senior Digital Design Engineer — Cambridge, UK

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Position Requirements
10+ Years work experience
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