Principal SoC Architect - Automotive Vision Silicon
Listed on 2026-02-28
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Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer
Role Overview
We are seeking an experienced SoC Architect (Expert) to work on our custom automotive SoC across the full lifecycle—from architecture modeling, RTL design & verification, synthesis, physical design, tapeout, and post-silicon validation.
This work is in collaboration with our SoC partners and has to provide technical leadership throughout its life cycle. This role emphasizes performance, power management innovation and functional safety compliance, ensuring reliable performance for our next-generation high-performance sensor systems.
With responsibility for guiding post-silicon debug and corrective tape-outs and driving platform evolution, the ideal candidate will combine deep technical expertise in Arm/RISC CPUs and DSPs with a passion for advancing automotive-grade semiconductor solutions.
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Key Responsibilities- Evaluate and optimize the SoC across the full lifecycle: architecture, design, RTL design/verification, synthesis, physical implementation, tapeout, and post-silicon validation
- Drive power management strategies, including dynamic voltage/frequency scaling, leakage reduction, and low-power design techniques
- Lead post-silicon debug and corrective tapeouts, ensuring timely resolution of errata and design issues
- Contribute to platform evolution, enabling next-generation SoC iterations with enhanced performance, efficiency, and safety features
- Collaborate with external design houses, foundries, and IP vendors to execute tapeout and silicon bring-up activities
- Perform functional safety analysis (ISO 26262) and ensure compliance with automotive industry standards (ASIL, AEC-Q100)
- Support DFT (Design for Testability) and DFM (Design for Manufacturability) strategies for reliable production
- Conduct microarchitectural analysis and workload characterization to optimize performance/power trade-offs
- Document and communicate findings to cross-functional teams, enabling informed design decisions
- 7+ years of experience in SoC design and evaluation, with proven expertise across the full lifecycle (architecture, RTL, synthesis, physical design, tapeout, post‑silicon validation).
- Strong background in Arm/RISC CPU and DSP architectures for high‑performance, low‑power SoCs.
- Experience with functional safety standards (ISO 26262) and certification processes in automotive.
- Hands-on experience with EDA tools (Synopsys, Cadence, Mentor) for simulation, synthesis, and verification.
- Track record of successful tapeouts, including post‑silicon debug and corrective tapeouts.
- Demonstrated contributions to platform evolution in semiconductor programs.
- Excellent communication and collaboration skills, with the ability to work across internal and external teams.
- GPU experience is a plus for system‑level performance optimization.
- Proven expertise across the SoC lifecycle: architecture modeling, RTL design/verification, synthesis, physical design, tapeout, and post-silicon validation
- Strong background in Arm/RISC CPUs and DSPs for high-performance, low-power So Cs
- Hands-on experience with EDA tools (Synopsys, Cadence, Mentor) for simulation, synthesis, verification, and sign-off
- Track record of successful tapeouts, including post-silicon debug and corrective tapeouts
- Experience with functional safety standards (ISO 26262) and automotive certification processes (ASIL, AEC-Q100)
- Strong analytical skills for microarchitectural analysis and workload characterization
- Excellent communication and collaboration skills across internal and external teams
- Experience with GPU architectures for parallel compute workloads
- Knowledge of machine learning accelerators or AI-specific SoC design
- Familiarity with hardware security features (secure boot, crypto accelerators)
- Experience with multi-die packaging (chiplets, 2.5D/3D IC integration)
- Exposure to automotive networking standards
- Background in sensor signal processing (radar, lidar)
- Prior leadership or mentoring experience in SoC design teams
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