Senior ASIC Verification Engineer UVM

Position: Senior ASIC Verification Engineer with UVM
A leading semiconductor company in Belfast is looking for a skilled Verification Engineer to join their Data Centre design team. The ideal candidate will have hands-on experience in ASIC designs, particularly with Verilog/System Verilog and UVM. You will be responsible for defining test benches, enhancing verification methods, and contributing to ASIC development.

This role offers a collaborative environment and is ideal for those eager to tackle complex networking challenges while being part of an innovative and diverse team.
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