Server Timing Convergence Lead

A leading semiconductor company in Austin, Texas seeks a Timing Convergence Lead to drive cutting-edge semiconductor design. The role requires expertise in static timing analysis and debugging, alongside knowledge of tools like Synopsys Prime Time or Cadence Tempus. You will tackle complex design challenges and contribute toward next-generation server processors. Ideal candidates have 4+ years of experience, including familiarity with timing optimization techniques and scripting, enhancing data infrastructure performance.
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