Sr. Signal Integrity​/Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware

Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware

Annapurna Labs (our organization within AWS) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

We are seeking a Senior SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role in the definition, design and validation of AWS next generation machine learning ASICs. As a senior member of our hardware team, you will have a meaningful opportunity to participate in the design and execution of all SI related topics, with the goal of creating and customized platforms that fit within AWS datacenter’s world leading technology.

• Perform end-to-end high-speed channel simulations to ensure signal integrity across complex designs.
• Conduct SI/PI analysis to optimize PCB layouts, minimizing losses and signal degradation.
• Utilize simulation tools such as ADS, MATLAB, Cadence, HFSS, and others to evaluate performance and troubleshoot issues.
• Work with PCIe protocols and equalization techniques (DFE, CTLE, FFE) to optimize high-speed interfaces.
• Analyze clock distribution and jitter, ensuring signal timing and integrity across designs.
• Collaborate with PCB layout and hardware design teams to define optimal stack-ups and trade-offs for manufacturing feasibility and performance.
• Identify and mitigate PCB manufacturing issues, ensuring high production yield and reliability.
• Work closely with cross-functional teams, including hardware design, validation, and product engineering, to align on requirements and trade-offs.

• Deep understanding of SI concepts and strong analytical skills in signal and power integrity.
• Hands‑on experience with simulation tools such as ADS, MATLAB, Cadence, HFSS, and others.
• Proficiency in high‑speed channel simulations, including system‑level modeling and validation.
• Experience with PCIe protocols and equalization methods (DFE, CTLE, FFE).
• Knowledge of clock distribution and jitter analysis for high‑speed designs.
• Expertise in PCB layout and board manufacturing processes, including identifying and mitigating potential issues.
• Hands‑on experience in stack‑up design, including dielectric material selection, impedance control, and layer optimization.

• Experience in power integrity analysis and power delivery network (PDN) optimization.
• Familiarity with high‑speed design compliance testing and validation methodologies.
• Knowledge of EMC/EMI mitigation techniques.

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The base salary range for this position in Austin, TX is  -  USD annually. Your Amazon package will include sign‑on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D), 401(k) matching, paid time off, and parental leave.

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February 9, 2026 (Updated about 23 hours ago)