IP Logic Design Engineer

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** Welcome!**## .IP Logic Design Engineer page is loaded## IP Logic Design Engineer locations:
US, California, Santa Clara:
US, Texas, Austin time type:
Full time posted on:
Posted Todayjob requisition :
JR0280432#
** Job Details:**##

Job Description:

** Do Something Wonderful!
** Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
** Who We Are
** As part of Intel's Data Center Engineering Group, we develop cutting-edge IPs that serve as foundational components for the next generation of server processors. We specialize in the design and development of complex IP blocks and subsystems, with a strong emphasis on IO architecture
** Who You Are
** Your responsibilities include but not limited to:
* Defines, documents and designs the microarchitecture of IP blocks and subsystems
* Owns the register transfer level (RTL) development for the IP block and implements the specification for logic components
* Ensures quality of design through clean design partitioning, clear microarchitectural documentation, reviewing RTL design and verification of features
* Applies various strategies, tools and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals
* Delivers microarchitecture specifications (MAS) document along with detailed clear block diagram, signal level description, clocking details, power and timing requirements to capture the implementation details and ensure correct interactions between blocks or Ips
* Reviews the verification plan and implementation to ensure design features are verified correctly and implements corrective measures for failing RTL tests to ensure correctness of features
* Supports SoC customers to ensure high quality integration and verification of the IP block
* Drives quality assurance compliance for smooth IP to SoC handoff
* Supports post-silicon activity to enable various features
* Good problem-solving ability
* Excellent technical leadership/teamwork/communication skills and a proven ability to work with dynamic schedules##
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* Qualifications:

** You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

** Minimum Qualifications
*** Candidate should possess a Bachelor's Degree – OR - Master's Degree in Electrical, Electronics or Computer Engineering
* 5+ years of experience in IP design for SoC or ASIC products.
* Experience in chip design with familiarity of the entire development flow from definition to tape-out
* Experience in high-speed I/O protocols (e.g., PCIe, CXL, Ethernet, proprietary interconnects).
* Experience with protocol conversion and coherency management between different domains (I/O and memory/coherent fabrics).
* Ability to debug and resolve issues across multiple domains (I/O, coherency, ordering).
* Proficiency in designing and verifying complex interface signals, including clock and power domain crossing.
* Hands-on experience with RTL design, simulation, debugging, triaging, running synthesis and timing analysis.  
** Preferred Qualifications
*** System simulation models and debugging RTL/tests
* Experience in High-speed serial link protocols/IPs (PCIe, UPI, CXL, IOMMU etc)
* Experience in Computer architecture and PCIe, UPI, CXL, IOMMU, Cache Coherency protocols.
* Experience in authoring Functional Specifications
* Strong skills in interpreting and contributing to technical specifications and  Solid problem-solving and analytical skills.## Job Type:Experienced Hire##

Shift: Shift 1 (United States of America)## Primary

Location:

US, California, Santa Clara## Additional Locations:

US, Texas, Austin## Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership.

Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.## Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national…