Senior Principal DFT Design Engineer

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Join to apply for the Senior Principal DFT Design Engineer role at Cadence

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are looking for a SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge of scan‑chain insertion, compression scan technologies, memory built‑in self‑test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Candidates should follow systematic, quality‑metrics‑driven ATPG pattern generation. Hands‑on knowledge of synthesis, verification, and debugging Verilog test benches is highly desirable.

Requirements:

US citizenship preferred.

• Prior 5-15 years of professional experience in SoC/ASIC Digital Design with a focus on Design for Test (DFT)
• Intimate knowledge of DFT insertion flows
• Basic scan‑chain insertion using synthesis or other software tools
• Experience in compression scan insertion, LBIST and other scan technologies
• Intimate knowledge of memory built‑in self‑test (MBIST)
• Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goals
• Debug and analysis of failures to improve fault coverage
• Verification of ATPG test benches and debugging of root cause of simulation mis‑compares
• Working knowledge of JTAG 1149.1/6, IEEE
  1500 and IEEE
  1687
• Knowledge of timing analysis and equivalency checks would be an added bonus
• Ability to work in a collaborative team environment
• Prior experience with Cadence tools and flows is highly desirable
• Ability to finish DFT tasks independently
• Strong problem‑solving skills; exhibit discipline, thoroughness, and a methodical approach to solving problems
• Ability to work with stakeholders across cross‑functional teams – Architecture, Design, Internal and External Customers
• Self‑driven and committed individual who can work in a fast‑paced project environment

We’re doing work that matters. Help us solve what others can’t.

Mid‑Senior level

Full‑time

Engineering and Information Technology

Industries

Software Development

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