Physical Design Engineer

Physical Design Engineer – Qualcomm

Company: Qualcomm Technologies, Inc.

Job Area: Engineering Group, ASICS Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what’s possible to enable next‑generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using state‑of‑the‑art tools and technologies.

Responsibilities include complete Physical Design Flow delivery for complex, high‑speed, low‑power designs such as GPU, Camera, and other MM, DDR, Modem, Audio. Tasks also involve development and enablement of low‑power implementation methods, customized P&R to achieve area reduction, performance, and power goals. Additional responsibilities involve deep understanding of functional and test (DFT) mode constraints for place and route, floor planning, power planning, IR drop analysis, cell placement, multi‑mode & multi‑corner (MMMC) clock tree synthesis, routing, timing optimization and closure, RC extraction, signal integrity, cross‑talk noise and delay analysis, debugging timing violations for MMMC designs, implementing timing fixes and functional ECOs, debugging and fixing physical violations, and formal verification.

The role requires scripting and software languages including Python, PERL/TCL, Linux/Unix shell and

C. The engineer will design, verify, and deliver complex Physical Design solutions from netlist and timing constraints to the final product.

• 6+ years industry experience in Physical Design
• Place & Route tool experience on Cadence Innovus and/or Synopsys Fusion Compiler
• Timing closure experience in Synopsys PTSI
• Formal verification experience
• Power domain analysis experience
• Physical verification experience

• Bachelor’s degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• Master’s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑ or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process.

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EEO

Employer:

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection…