Chiplet Architecture Modeling
Listed on 2026-01-12
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Engineering
Systems Engineer, Electrical Engineering, Robotics, Data Engineer
CHIPLET ARCHITECTURE PERFORMANCE MODELLING INTERN – IMEC AUTOMOTIVE SEMICONDUCTOR R&D CENTER Architecture Key description Purpose of the job:
The purpose of this job is to model the performance of chiplet architectures running workloads for automotive applications and to compare the performance to system-on-a-chip solutions.
Performance modeling will use an analytical tool developed by imec.
A cost model of the chiplet architecture will also be developed.
The expectation is that the specific architecture to be modeled will be provided by a automotive partner (to be defined) in the Michigan ecosystem. The results of the study will be reported out to the partner.
Currently enrolled in PhD program in electrical engineering, computer engineering, or computer science with experience relevant to chiplet architecture performance modeling.
Tasks and responsibilities- Become proficient in the use of imec’s analytical tool for chiplet performance modeling
- Work with imec leads and external partners to define the scope of the architecture being modeled
- Develop a performance model for the system and compare the performance to system-on-a-chip solutions for the same task
- Develop a cost-model for the chiplet based solution
- Deliver a report on the findings of the development
- Review findings with imec leads and external partners
Note that this position is at the imec Automotive Semiconductor R&D Center in Ann Arbor, MI. Relocation is not being offered for this position. This position will run from May 5th to August 14th, 2025 with an expectation of 40 hours of work per week.
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